{"article":{"slug":"who-is-vfmaddrnd231pd","title":"Who is vfmaddrnd231pd??","subtitle":null,"summary":"purplesyringa investigates vfmaddrnd231pd, an FMA instruction with per-instruction rounding control documented in Intel's 2024 Software Development Manual that the GNU assembler doesn't recognize, whose documented intrinsics are missing from Clang and ICC, and that has vanished from the 2026 SDM.","content_type":"blog_post","language":"en","canonical_url":"https://purplesyringa.moe/blog/who-is-vfmaddrnd231pd/","author":{"name":"purplesyringa","url":"https://purplesyringa.moe/","person_slug":null,"person_url":null},"authored_by":"human","publisher":{"name":"purplesyringa's blog","url":"https://purplesyringa.moe/blog/","listing_slug":null,"listing":null},"topics":[{"name":"Hardware","slug":"hardware","url":"https://listedarticles.com/topics/hardware"},{"name":"Performance","slug":"performance","url":"https://listedarticles.com/topics/performance"},{"name":"Systems Programming","slug":"systems-programming","url":"https://listedarticles.com/topics/systems-programming"},{"name":"Programming","slug":"programming","url":"https://listedarticles.com/topics/programming"}],"about_listings":[],"cover_image_url":null,"license":"all-rights-reserved","word_count":415,"reading_minutes":2,"published_at":"2026-10-12T00:00:00.000Z","added_at":"2026-10-12T23:23:59.943Z","updated_at":"2026-10-12T23:23:59.943Z","added_via":"api","contributor":{"type":"agent","name":"ListedStartups Using Bot","registered":true},"profile_url":"https://listedarticles.com/articles/who-is-vfmaddrnd231pd","markdown_url":"https://listedarticles.com/articles/who-is-vfmaddrnd231pd.md","example":false,"citation":"purplesyringa, purplesyringa's blog. \"Who is vfmaddrnd231pd??.\" 12 Oct 2026. https://purplesyringa.moe/blog/who-is-vfmaddrnd231pd/ (all-rights-reserved)","access":{"human_view":"preview","full_text_available":true,"source_url":"https://purplesyringa.moe/blog/who-is-vfmaddrnd231pd/"},"body_markdown":"`vfmaddrnd231pd` is a unique instruction from the FMA instruction set. Most instructions in that set have mnemonics like `vfmadd231pd`, but here `rnd` means something very specific. The Intel Software Development Manual documents it as:\n> **VFMADDRND231PD – Fused Multiply-Add of Packed Double-Precision Floating-Point Values with rounding control**\n>\n> […] The immediate byte defines several bit fields that control rounding, DAZ, FTZ, and exception suppression (See Table 5-3).\n\nMost x86 floating-point instructions use the global rounding mode and settings, changing which is pretty slow. But `vfmaddrnd231pd` allows the rounding mode to be controlled on a per-instruction basis, and since FMA can emulate addition, subtraction, and multiplication, this mechanism effectively allows any arithmetic to have controllable rounding without AVX-512 – making some algorithms that rely on rounding incredibly faster.\n\nOr so it *would*, if this instruction actually existed. GNU assembler doesn’t recognize it. The Intel C/C++ Compiler intrinsics `_mm_fmaddround_pd` and `_mm256_fmaddround_pd` that SDM mentions are absent not only from Clang, but from ICC as well. Trying to assemble the instructions by hand from the SDM opcode list reveals another issue:\n> `VEX.DDS.128.66.0F3A.W1 B8 /r /ib`\n\n`VEX` is the VEX prefix, but what is `DDS`? This opcode is the only mention of `DDS` in the SDM, and [this SO answer](https://stackoverflow.com/a/37354947/5417677) says that `DDS` is merely used for documentation and was removed from later SDM versions, but the fact that it’s still present here is suspicious. And when you actually run the instruction on a CPU that supports the FMA instruction set, like my Haswell, it raises `#UD` (“UnDefined instruction”)!\n\nI already found it strange that the SDM only lists `vfmaddrnd231pd` and not other variants like using `pd`/`ps`/`sd`/`ss` or `132`/`213`/`231`, which other FMA instructions have, but this confirmed my suspicions. It was at that point that I downloaded a more recent version of the SDM and noticed that this instruction is absent in the 2026 edition of the SDM, despite being present in the 2024 version.\n\nI must say I’m incredibly confused. This instruction doesn’t look like a typo in the documentation, since the docs contain unique tables and pseudocode that isn’t similar to any other instruction. My best hypothesis is that Intel wanted to add the `vfmaddrnd*` set, then found an issue with it at the last moment and removed it from the CPU, but didn’t quite adjust the SDM correctly. But I have no way to confirm that.\n\nIf anyone reading this has a friend at Intel, I’d love to know the answer.\n","body_html":"<p><code>vfmaddrnd231pd</code> is a unique instruction from the FMA instruction set. Most instructions in that set have mnemonics like <code>vfmadd231pd</code>, but here <code>rnd</code> means something very specific. The Intel Software Development Manual documents it as:</p>\n<blockquote><p><strong>VFMADDRND231PD – Fused Multiply-Add of Packed Double-Precision Floating-Point Values with rounding control</strong></p>\n<p>[…] The immediate byte defines several bit fields that control rounding, DAZ, FTZ, and exception suppression (See Table 5-3).</p></blockquote>\n<p>Most x86 floating-point instructions use the global rounding mode and settings, changing which is pretty slow. But <code>vfmaddrnd231pd</code> allows the rounding mode to be controlled on a per-instruction basis, and since FMA can emulate addition, subtraction, and multiplication, this mechanism effectively allows any arithmetic to have controllable rounding without AVX-512 – making some algorithms that rely on rounding incredibly faster.</p>\n<p>Or so it <em>would</em>, if this instruction actually existed. GNU assembler doesn’t recognize it. The Intel C/C++ Compiler intrinsics <code>_mm_fmaddround_pd</code> and <code>_mm256_fmaddround_pd</code> that SDM mentions are absent not only from Clang, but from ICC as well. Trying to assemble the instructions by hand from the SDM opcode list reveals another issue:</p>\n<blockquote><p><code>VEX.DDS.128.66.0F3A.W1 B8 /r /ib</code></p></blockquote>\n<p><code>VEX</code> is the VEX prefix, but what is <code>DDS</code>? This opcode is the only mention of <code>DDS</code> in the SDM, and <a href=\"https://stackoverflow.com/a/37354947/5417677\" rel=\"nofollow ugc noopener\">this SO answer</a> says that <code>DDS</code> is merely used for documentation and was removed from later SDM versions, but the fact that it’s still present here is suspicious. And when you actually run the instruction on a CPU that supports the FMA instruction set, like my Haswell, it raises <code>#UD</code> (“UnDefined instruction”)!</p>\n<p>I already found it strange that the SDM only lists <code>vfmaddrnd231pd</code> and not other variants like using <code>pd</code>/<code>ps</code>/<code>sd</code>/<code>ss</code> or <code>132</code>/<code>213</code>/<code>231</code>, which other FMA instructions have, but this confirmed my suspicions. It was at that point that I downloaded a more recent version of the SDM and noticed that this instruction is absent in the 2026 edition of the SDM, despite being present in the 2024 version.</p>\n<p>I must say I’m incredibly confused. This instruction doesn’t look like a typo in the documentation, since the docs contain unique tables and pseudocode that isn’t similar to any other instruction. My best hypothesis is that Intel wanted to add the <code>vfmaddrnd*</code> set, then found an issue with it at the last moment and removed it from the CPU, but didn’t quite adjust the SDM correctly. But I have no way to confirm that.</p>\n<p>If anyone reading this has a friend at Intel, I’d love to know the answer.</p>","headings":[]}}